UM10360 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
User manual Rev. 3 — 20 December 2013 682 of 841
NXP Semiconductors
UM10360
Chapter 34: Appendix: Cortex-M3 user guide
34.2.5.2 AND, ORR, EOR, BIC, and ORN
Logical AND, OR, Exclusive OR, Bit Clear, and OR NOT.
34.2.5.2.1 Syntax
op{S}{cond} {Rd,} Rn, Operand2
where:
op is one of:
AND:
logical AND.
ORR:
logical OR, or bit set.
EOR:
logical Exclusive OR.
BIC:
logical AND NOT, or bit clear.
ORN:
logical OR NOT.
S is an optional suffix. If S is specified, the condition code flags are updated on the result
of the operation, see Section 34.2.3.7 “
Conditional execution”.
cond is an optional condition code, see Section 34.2.3.7 “
Conditional execution”.
Rd is the destination register.
Rn is the register holding the first operand.
Operand2 is a flexible second operand. See Section 34.2.3.3
for details of the options.
34.2.5.2.2 Operation
The
AND
,
EOR
, and
ORR
instructions perform bitwise AND, Exclusive OR, and OR operations
on the values in Rn and Operand2.
The
BIC
instruction performs an AND operation on the bits in Rn with the complements of
the corresponding bits in the value of Operand2.
The
ORN
instruction performs an OR operation on the bits in Rn with the complements of
the corresponding bits in the value of Operand2.
34.2.5.2.3 Restrictions
Do not use SP and do not use PC.
34.2.5.2.4 Condition flags
If S is specified, these instructions:
• update the N and Z flags according to the result
• can update the C flag during the calculation of Operand2, see Section 34.2.3.3
• do not affect the V flag.
34.2.5.2.5 Examples
AND R9, R2, #0xFF00
ORREQ R2, R0, R5
ANDS R9, R8, #0x19
To Next Page
Loading...
