NXP Semiconductors LPC1768 - Slave Receiver Mode

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User manual Rev. 3 — 19 December 2013 434 of 841
NXP Semiconductors
UM10360
Chapter 19: LPC176x/5x I2C0/1/2
After a repeated START condition, I
2
C may switch to the master transmitter mode.
19.6.3 Slave Receiver mode
In the slave receiver mode, data bytes are received from a master transmitter. To initialize
the slave receiver mode, write any of the Slave Address registers (I2ADR0-3) and Slave
Mask registers (I2MASK0-3) and write the I
2
C Control Set register (I2CONSET) as shown
in Table 382
.
I2EN must be set to 1 to enable the I
2
C function. AA bit must be set to 1 to acknowledge
any of its own slave addresses or the General Call address. The STA, STO and SI bits are
set to 0.
After I2ADR and I2CONSET are initialized, the I
2
C interface waits until it is addressed by
its any of its own slave addresses or General Call address followed by the data direction
bit. If the direction bit is 0 (W), it enters slave receiver mode. If the direction bit is 1 (R), it
enters slave transmitter mode. After the address and direction bit have been received, the
SI bit is set and a valid status code can be read from the Status register (I2STAT). Refer to
Table 400
for the status codes and actions.
Fig 87. A Master Receiver switches to Master Transmitter after sending repeated START
A = Acknowledge (SDA low)
A = Not acknowledge (SDA high)
S = START condition
P = STOP condition
SLA = Slave Address
Sr = Repeated START condition
DATA
n bytes data transmitted
From master to slave
From slave to master
A DATA A ASLA R Sr W PS SLA DATAAA
Table 382. I2C0CONSET, I2C1CONSET and I2C2CONSET used to configure Slave mode
Bit 7 6 5 4 3 2 1 0
Symbol - I2EN STA STO SI AA - -
Value- 10001- -
Fig 88. Format of Slave Receiver mode
A
A = Acknowledge (SDA low)
A = Not acknowledge (SDA high)
S = START condition
P = STOP condition
Sr = Repeated START condition
A
A/A
n bytes data received
from Master to Slave
from Slave to Master
S SLAVE ADDRESS RW=0 DATA P/SrDATA