UM10360 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
User manual Rev. 3 — 19 December 2013 345 of 841
NXP Semiconductors
UM10360
Chapter 16: LPC176x/5x CAN1/2
• Guaranteed latency time for high priority messages.
• Programmable transfer rate (up to 1 Mbit/s).
• Multicast and broadcast message facility.
• Data length from 0 up to 8 bytes.
• Powerful error handling capability.
• Non-return-to-zero (NRZ) encoding/decoding with bit stuffing.
16.3.2 CAN controller features
• 2 CAN controllers and buses.
• Supports 11-bit identifier as well as 29-bit identifier.
• Double Receive Buffer and Triple Transmit Buffer.
• Programmable Error Warning Limit and Error Counters with read/write access.
• Arbitration Lost Capture and Error Code Capture with detailed bit position.
• Single Shot Transmission (no re-transmission).
• Listen Only Mode (no acknowledge, no active error flags).
• Reception of "own" messages (Self Reception Request).
16.3.3 Acceptance filter features
• Fast hardware implemented search algorithm supporting a large number of CAN
identifiers.
• Global Acceptance Filter recognizes 11-bit and 29-bit Rx Identifiers for all CAN buses.
• Allows definition of explicit and groups for 11-bit and 29-bit CAN identifiers.
• Acceptance Filter can provide FullCAN-style automatic reception for selected
Standard Identifiers.
16.4 Pin description
16.5 CAN controller architecture
The CAN Controller is a complete serial interface with both Transmit and Receive Buffers
but without Acceptance Filter. CAN Identifier filtering is done for all CAN channels in a
separate block (Acceptance Filter). Except for message buffering and acceptance filtering
the functionality is similar to the PeliCAN concept.
The CAN Controller Block includes interfaces to the following blocks:
• APB Interface
• Acceptance Filter
Table 311. CAN Pin descriptions
Pin Name Type Description
RD1, RD2 Input Serial Inputs. From CAN transceivers.
TD1, TD2 Output
Serial Outputs. To CAN transceivers.