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User manual Rev. 3 — 19 December 2013 241 of 841
NXP Semiconductors
UM10360
Chapter 11: LPC176x/5x USB device controller
11.10.7.11 USB End of Transfer Interrupt Clear register (USBEoTIntClr - 0x5000 C2A4)
Writing one to a bit in this register clears the corresponding bit in the USBEoTIntSt
register. Writing zero has no effect. USBEoTIntClr is a write-only register.
11.10.7.12 USB End of Transfer Interrupt Set register (USBEoTIntSet - 0x5000 C2A8)
Writing one to a bit in this register sets the corresponding bit in the USBEoTIntSt register.
Writing zero has no effect. USBEoTIntSet is a write-only register.
11.10.7.13 USB New DD Request Interrupt Status register (USBNDDRIntSt - 0x5000
C2AC)
A bit in this register is set when a transfer is requested from the USB device and no valid
DD is detected for the corresponding endpoint. USBNDDRIntSt is a read-only register.
11.10.7.14 USB New DD Request Interrupt Clear register (USBNDDRIntClr - 0x5000
C2B0)
Writing one to a bit in this register clears the corresponding bit in the USBNDDRIntSt
register. Writing zero has no effect. USBNDDRIntClr is a write-only register.
11.10.7.15 USB New DD Request Interrupt Set register (USBNDDRIntSet - 0x5000
C2B4)
Writing one to a bit in this register sets the corresponding bit in the USBNDDRIntSt
register. Writing zero has no effect. USBNDDRIntSet is a write-only register
Table 233. USB End of Transfer Interrupt Clear register (USBEoTIntClr - address 0x5000 C2A4) bit description
Bit Symbol Value Description Reset value
31:0 EPxx Clear endpoint xx (2 ï‚£ï€ xx ï‚£ï€ 31) End of Transfer Interrupt request. 0
0 No effect.
1 Clear the EPxx End of Transfer Interrupt request in the USBEoTIntSt register.
Table 234. USB End of Transfer Interrupt Set register (USBEoTIntSet - address 0x5000 C2A8) bit description
Bit Symbol Value Description Reset value
31:0 EPxx Set endpoint xx (2 ï‚£ï€ xx ï‚£ï€ 31) End of Transfer Interrupt request. 0
0 No effect.
1 Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register.
Table 235. USB New DD Request Interrupt Status register (USBNDDRIntSt - address 0x5000 C2AC) bit description
Bit Symbol Value Description Reset value
31:0 EPxx Endpoint xx (2 ï‚£ï€ xx ï‚£ï€ 31) new DD interrupt request. 0
0 There is no new DD interrupt request for endpoint xx.
1 There is a new DD interrupt request for endpoint xx.
Table 236. USB New DD Request Interrupt Clear register (USBNDDRIntClr - address 0x5000 C2B0) bit description
Bit Symbol Value Description Reset value
31:0 EPxx Clear endpoint xx (2 ï‚£ï€ xx ï‚£ï€ 31) new DD interrupt request. 0
0 No effect.
1 Clear the EPxx new DD interrupt request in the USBNDDRIntSt register.