NXP Semiconductors LPC1768 - Scenario 4: Clearing Message Lost Bit

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User manual Rev. 3 — 19 December 2013 393 of 841
NXP Semiconductors
UM10360
Chapter 16: LPC176x/5x CAN1/2
16.16.3.6 Scenario 4: Clearing Message Lost bit
This scenario is a special case in which the lost message bit of an object gets set during
an overwrite of a none read message object (2
nd
Object write). The subsequent read out
of that object by Software (1
st
Object read) clears the pending Interrupt. The 3
rd
Object
write clears the Message Lost bit. Every “write ID, SEM” clears Message Lost bit if no
pending Interrupt of that object is set.
Fig 69. Message overwritten indicated by message lost
IntPndx
semaphore
bits
look-up
table
access
MsgLostx
message
handler
access
ARM
processor
access
write
SEM
write
D2
write
D1
write
ID,
SEM
01 11 01 11 00
1st Object
write
2nd Object
write
1st Object
read
Interrupt Service
Routine
01 11
3rd Object
write
write
SEM
write
D2
write
D1
write
ID,
SEM
write
SEM
write
D2
write
D1
write
ID,
SEM
read
SEM
read
D2
read
D1
read
SEM
clear
SEM