UM10360 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
User manual Rev. 3 — 19 December 2013 304 of 841
NXP Semiconductors
UM10360
Chapter 14: LPC176x/5x UART0/2/3
14.4.5 UARTn Interrupt Identification Register (U0IIR - 0x4000 C008, U2IIR -
0x4009 8008, U3IIR - 0x4009 C008)
The UnIIR provides a status code that denotes the priority and source of a pending
interrupt. The interrupts are frozen during an UnIIR access. If an interrupt occurs during
an UnIIR access, the interrupt is recorded for the next UnIIR access.
Bit UnIIR[9:8] are set by the auto-baud function and signal a time-out or end of auto-baud
condition. The auto-baud interrupt conditions are cleared by setting the corresponding
Clear bits in the Auto-baud Control Register.
If the IntStatus bit is 1 no interrupt is pending and the IntId bits will be zero. If the IntStatus
is 0, a non auto-baud interrupt is pending in which case the IntId bits identify the type of
interrupt and handling as described in Table 277
. Given the status of UnIIR[3:0], an
interrupt handler routine can determine the cause of the interrupt and how to clear the
active interrupt. The UnIIR must be read in order to clear the interrupt prior to exiting the
Interrupt Service Routine.
The UARTn RLS interrupt (UnIIR[3:1] = 011) is the highest priority interrupt and is set
whenever any one of four error conditions occur on the UARTn Rx input: overrun error
(OE), parity error (PE), framing error (FE) and break interrupt (BI). The UARTn Rx error
condition that set the interrupt can be observed via UnLSR[4:1]. The interrupt is cleared
upon an UnLSR read.
Table 276: UARTn Interrupt Identification Register (U0IIR - address 0x4000 C008, U2IIR - 0x4009 8008, U3IIR -
0x4009 C008) bit description
Bit Symbol Value Description Reset Value
0 IntStatus Interrupt status. Note that UnIIR[0] is active low. The pending interrupt can be
determined by evaluating UnIIR[3:1].
1
0 At least one interrupt is pending.
1 No interrupt is pending.
3:1 IntId Interrupt identification. UnIER[3:1] identifies an interrupt corresponding to the
UARTn Rx or TX FIFO. All other combinations of UnIER[3:1] not listed below
are reserved (000,100,101,111).
0
011 1 - Receive Line Status (RLS).
010 2a - Receive Data Available (RDA).
110 2b - Character Time-out Indicator (CTI).
001 3 - THRE Interrupt
5:4 - Reserved, user software should not write ones to reserved bits. The value read
from a reserved bit is not defined.
NA
7:6 FIFO Enable Copies of UnFCR[0]. 0
8 ABEOInt End of auto-baud interrupt. True if auto-baud has finished successfully and
interrupt is enabled.
0
9 ABTOInt Auto-baud time-out interrupt. True if auto-baud has timed out and interrupt is
enabled.
0
31:10 - Reserved, user software should not write ones to reserved bits. The value read
from a reserved bit is not defined.
NA
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