UM10360 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
User manual Rev. 3 — 19 December 2013 119 of 841
NXP Semiconductors
UM10360
Chapter 8: LPC176x/5x Pin connect block
[1] Not available on 80-pin package.
8.5.19 Open Drain Pin Mode select register 3 (PINMODE_OD3 - 0x4002 C074)
This register controls the open drain mode for Port 3 pins. For details see Section 8.4 “Pin
mode select register values”.
[1] Not available on 80-pin package.
8.5.20 Open Drain Pin Mode select register 4 (PINMODE_OD4 - 0x4002 C078)
This register controls the open drain mode for Port 4 pins. For details see Section 8.4 “Pin
mode select register values”.
5 P2.05OD Port 2 pin 5 open drain mode control, see P2.00OD 0
6 P2.06OD Port 2 pin 6 open drain mode control, see P2.00OD 0
7 P2.07OD Port 2 pin 7 open drain mode control, see P2.00OD 0
8 P2.08OD Port 2 pin 8 open drain mode control, see P2.00OD 0
9 P2.09OD Port 2 pin 9 open drain mode control, see P2.00OD 0
10 P2.10OD Port 2 pin 10 open drain mode control, see P2.00OD 0
11 P2.11OD
[1]
Port 2 pin 11 open drain mode control, see P2.00OD 0
12 P2.12OD
[1]
Port 2 pin 12 open drain mode control, see P2.00OD 0
13 P2.13OD
[1]
Port 2 pin 13 open drain mode control, see P2.00OD 0
31:14 - Reserved. NA
Table 96. Open Drain Pin Mode select register 2 (PINMODE_OD2 - address 0x4002 C070) bit
description …continued
PINMODE
_OD2
Symbol Value Description Reset
value
Table 97. Open Drain Pin Mode select register 3 (PINMODE_OD3 - address 0x4002 C074) bit
description
PINMODE
_OD3
Symbol Value Description Reset
value
24:0 - Reserved. NA
25 P3.25OD
[1]
Port 3 pin 25 open drain mode control. 0
0 P3.25 pin is in the normal (not open drain) mode.
1 P3.25 pin is in the open drain mode.
26 P3.26OD
[1]
Port 3 pin 26 open drain mode control, see P3.25OD 0
31:27 - Reserved. NA
Table 98. Open Drain Pin Mode select register 4 (PINMODE_OD4 - address 0x4002 C078) bit
description
PINMODE
_OD4
Symbol Value Description Reset
value
27:0 - Reserved. NA