NXP Semiconductors LPC1768 - Details of I C Operating Modes

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User manual Rev. 3 — 19 December 2013 450 of 841
NXP Semiconductors
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Chapter 19: LPC176x/5x I2C0/1/2
19.9 Details of I
2
C operating modes
The four operating modes are:
• Master Transmitter
• Master Receiver
• Slave Receiver
• Slave Transmitter
Data transfers in each mode of operation are shown in Figure 93
, Figure 94, Figure 95,
Figure 96
, and Figure 97. Table 395 lists abbreviations used in these figures when
describing the I
2
C operating modes.
In Figure 93 to Figure 97, circles are used to indicate when the serial interrupt flag is set.
The numbers in the circles show the status code held in the I2STAT register. At these
points, a service routine must be executed to continue or complete the serial transfer.
These service routines are not critical since the serial transfer is suspended until the serial
interrupt flag is cleared by software.
When a serial interrupt routine is entered, the status code in I2STAT is used to branch to
the appropriate service routine. For each status code, the required software action and
details of the following serial transfer are given in tables from Table 398
to Table 402.
Table 395. Abbreviations used to describe an I
2
C operation
Abbreviation Explanation
S START condition
SLA 7-bit slave address
R Read bit (HIGH level at SDA)
W Write bit (LOW level at SDA)
A Acknowledge bit (LOW level at SDA)
A
Not acknowledge bit (HIGH level at SDA)
Data 8-bit data byte
P STOP condition
Sr Repeated START condition