NXP Semiconductors LPC1768 - Page 454

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User manual Rev. 3 — 19 December 2013 454 of 841
NXP Semiconductors
UM10360
Chapter 19: LPC176x/5x I2C0/1/2
Fig 94. Format and states in the Master Receiver mode
A
to Master
transmit
mode, entry
= MT
MR
to corresponding
states in Slave
mode
ARSLAS
RSLAS
W
AA OR A
A
P
other Master
continues
other Master
continues
A
other Master
continues
48H
40H 58H
10H
68H 78H B0H
38H 38H
arbitration lost in
Slave address or
Acknowledge bit
Not Acknowledge
received after the
Slave address
next transfer
started with a
Repeated Start
condition
arbitration lost
and addressed
as Slave
successful
transmission to
a Slave
transmitter
from Master to Slave
from Slave to Master
any number of data bytes and their associated
Acknowledge bits
n
this number (contained in I2STA) corresponds to a defined state of
the I
2
C bus
DATAADATA
50H
ADATA
P
08H