UM10360 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
User manual Rev. 3 — 19 December 2013 644 of 841
NXP Semiconductors
UM10360
Chapter 33: LPC176x/5x JTAG, Serial Wire Debug (SWD), and Trace
33.5 Debug Notes
Important: The user should be aware of certain limitations during debugging. The most
important is that, due to limitations of the Cortex-M3 integration, the LPC176x/5x cannot
wake up in the usual manner from Deep Sleep and Power-down modes. It is
recommended not to use these modes during debug.
Table 608. JTAG pin description
Pin Name Type Description
TCK Input JTAG Test Clock. This pin is the clock for debug logic when in the
JTAG debug mode.
TMS Input
JTAG Test Mode Select. The TMS pin selects the next state in the
TAP state machine.
TDI Input
JTAG Test Data In. This is the serial data input for the shift register.
TDO Output
JTAG Test Data Output. This is the serial data output from the shift
register. Data is shifted out of the device on the negative edge of the
TCK signal.
TRST
Input JTAG Test Reset. The TRST pin can be used to reset the test logic
within the debug logic.
RTCK Output
JTAG Returned Test Clock. This is an extra signal added to the
JTAG port, and is included for backward pin compatibility with
LPC23xx series devices that share the same pinout as this device.
RTCK is not normally used with the Cortex-M3.
For designs based on ARM7TDMI-S processor core, this signal
could be used by external JTAG host interface logic to maintain
synchronization with targets having a slow or varying clock
frequency. For details refer to "Multi-ICE System Design
considerations Application Note 72 (ARM DAI 0072A)".
Table 609. Serial Wire Debug pin description
Pin Name Type Description
SWDCLK Input Serial Wire Clock. This pin is the clock for debug logic when in the
Serial Wire Debug mode.
SWDIO Input /
Output
Serial wire debug data input/output. The SWDIO pin is used by an
external debug tool to communicate with and control the Cortex-M3
CPU.
SWO Output
Serial Wire Output. The SWO pin can deliver Serial Wire Viewer
data only. Serial Wire Viewer data includes ITM and DWT trace data.
Table 610. Parallel Trace pin description
Pin Name Type Description
TRACECLK Input Trace Clock. This pin provides the sample clock for trace data on
the TRACEDATA pins when tracing is enabled by an external debug
tool.
TRACEDATA[3:0] Output
Trace Data bits 3 to 0. These pins provide ETM trace data when
tracing is enabled by an external debug tool. The debug tool can
then interpret the compressed information and make it available to
the user.
To Next Page
Loading...
Need help?
General
