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NXP Semiconductors LPC1768 User Manual

NXP Semiconductors LPC1768
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UM10360 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
User manual Rev. 3 — 19 December 2013 78 of 841
NXP Semiconductors
UM10360
Chapter 6: LPC176x/5x Nested Vectored Interrupt Controller (NVIC)
6.5.1 Interrupt Set-Enable Register 0 register (ISER0 - 0xE000 E100)
The ISER0 register allows enabling the first 32 peripheral interrupts, or for reading the
enabled state of those interrupts. The remaining interrupts are enabled via the ISER1
register (Section 6.5.2
). Disabling interrupts is done through the ICER0 and ICER1
registers (Section 6.5.3
and Section 6.5.4).
Table 52. Interrupt Set-Enable Register 0 register (ISER0 - 0xE000 E100)
Bit Name Function
0 ISE_WDT Watchdog Timer Interrupt Enable.
Write: writing 0 has no effect, writing 1 enables the interrupt.
Read: 0 indicates that the interrupt is disabled, 1 indicates that the interrupt is enabled.
1 ISE_TIMER0 Timer 0 Interrupt Enable. See functional description for bit 0.
2 ISE_TIMER1 Timer 1. Interrupt Enable. See functional description for bit 0.
3 ISE_TIMER2 Timer 2 Interrupt Enable. See functional description for bit 0.
4 ISE_TIMER3 Timer 3 Interrupt Enable. See functional description for bit 0.
5 ISE_UART0 UART0 Interrupt Enable. See functional description for bit 0.
6 ISE_UART1 UART1 Interrupt Enable. See functional description for bit 0.
7 ISE_UART2 UART2 Interrupt Enable. See functional description for bit 0.
8 ISE_UART3 UART3 Interrupt Enable. See functional description for bit 0.
9 ISE_PWM PWM1 Interrupt Enable. See functional description for bit 0.
10 ISE_I2C0 I
2
C0 Interrupt Enable. See functional description for bit 0.
11 ISE_I2C1 I
2
C1 Interrupt Enable. See functional description for bit 0.
12 ISE_I2C2 I
2
C2 Interrupt Enable. See functional description for bit 0.
13 ISE_SPI SPI Interrupt Enable. See functional description for bit 0.
14 ISE_SSP0 SSP0 Interrupt Enable. See functional description for bit 0.
15 ISE_SSP1 SSP1 Interrupt Enable. See functional description for bit 0.
16 ISE_PLL0 PLL0 (Main PLL) Interrupt Enable. See functional description for bit 0.
17 ISE_RTC Real Time Clock (RTC) Interrupt Enable. See functional description for bit 0.
18 ISE_EINT0 External Interrupt 0 Interrupt Enable. See functional description for bit 0.
19 ISE_EINT1 External Interrupt 1 Interrupt Enable. See functional description for bit 0.
20 ISE_EINT2 External Interrupt 2 Interrupt Enable. See functional description for bit 0.
21 ISE_EINT3 External Interrupt 3 Interrupt Enable. See functional description for bit 0.
22 ISE_ADC ADC Interrupt Enable. See functional description for bit 0.
23 ISE_BOD BOD Interrupt Enable. See functional description for bit 0.
24 ISE_USB USB Interrupt Enable. See functional description for bit 0.
25 ISE_CAN CAN Interrupt Enable. See functional description for bit 0.
26 ISE_DMA GPDMA Interrupt Enable. See functional description for bit 0.
27 ISE_I2S I
2
S Interrupt Enable. See functional description for bit 0.
28 ISE_ENET Ethernet Interrupt Enable. See functional description for bit 0.
29 ISE_RIT Repetitive Interrupt Timer Interrupt Enable. See functional description for bit 0.
30 ISE_MCPWM Motor Control PWM Interrupt Enable. See functional description for bit 0.
31 ISE_QEI Quadrature Encoder Interface Interrupt Enable. See functional description for bit 0.

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NXP Semiconductors LPC1768 Specifications

General IconGeneral
BrandNXP Semiconductors
ModelLPC1768
CategoryMicrocontrollers
LanguageEnglish

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