NXP Semiconductors LPC1768 - Pin Descriptions; Bus Description; Texas Instruments Synchronous Serial Frame; Format

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User manual Rev. 3 — 19 December 2013 414 of 841
NXP Semiconductors
UM10360
Chapter 18: LPC176x/5x SSP0/1
18.4 Pin descriptions
18.5 Bus description
18.5.1 Texas Instruments synchronous serial frame format
Figure 76 shows the 4-wire Texas Instruments synchronous serial frame format supported
by the SSP module.
Table 368. SSP pin descriptions
Pin
Name
Type
Interface pin
name/function
Pin Description
SPI SSI Microwire
SCK0/1 I/O SCK CLK SK Serial Clock. SCK/CLK/SK is a clock signal used to synchronize the transfer
of data. It is driven by the master and received by the slave. When the SPI
interface is used, the clock is programmable to be active-high or active-low,
otherwise it is always active-high. SCK1 only switches during a data transfer.
Any other time, the SSPn interface either holds it in its inactive state, or does
not drive it (leaves it in high-impedance state).
SSEL0/1 I/O SSEL FS CS
Frame Sync/Slave Select. When the SSPn interface is a bus master, it
drives this signal to an active state before the start of serial data, and then
releases it to an inactive state after the serial data has been sent. The active
state of this signal can be high or low depending upon the selected bus and
mode. When the SSPn is a bus slave, this signal qualifies the presence of
data from the Master, according to the protocol in use.
When there is just one bus master and one bus slave, the Frame Sync or
Slave Select signal from the Master can be connected directly to the slave's
corresponding input. When there is more than one slave on the bus, further
qualification of their Frame Select/Slave Select inputs will typically be
necessary to prevent more than one slave from responding to a transfer.
MISO0/1 I/O MISO DR(M)
DX(S)
SI(M)
SO(S)
Master In Slave Out. The MISO signal transfers serial data from the slave to
the master. When the SSPn is a slave, serial data is output on this signal.
When the SSPn is a master, it clocks in serial data from this signal. When the
SSPn is a slave and is not selected by FS/SSEL, it does not drive this signal
(leaves it in high-impedance state).
MOSI0/1 I/O MOSI DX(M)
DR(S)
SO(M)
SI(S)
Master Out Slave In. The MOSI signal transfers serial data from the master
to the slave. When the SSPn is a master, it outputs serial data on this signal.
When the SSPn is a slave, it clocks in serial data from this signal.