NXP Semiconductors LPC1768 - Chapter 24: Lpc176 X;5 X Pulse Width Modulator (PWM); Basic Configuration; Features

UM10360 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
User manual Rev. 3 — 19 December 2013 510 of 841
24.1 Basic configuration
The PWM is configured using the following registers:
1. Power: In the PCONP register (Table 46
), set bit PCPWM1.
Remark: On reset, the PWM is enabled (PCPWM1 = 1).
2. Peripheral clock: In the PCLKSEL0 register (Table 40
), select PCLK_PWM1.
3. Pins: Select PWM pins through the PINSEL registers. Select pin modes for port pins
with PWM1 functions through the PINMODE registers (Section 8.5
).
4. Interrupts: See registers PWM1MCR (Table 449
) and PWM1CCR (Table 450) for
match and capture events. Interrupts are enabled in the NVIC using the appropriate
Interrupt Set Enable register.
24.2 Features
• Counter or Timer operation (may use the peripheral clock or one of the capture inputs
as the clock source).
• Seven match registers allow up to 6 single edge controlled or 3 double edge
controlled PWM outputs, or a mix of both types. The match registers also allow:
– Continuous operation with optional interrupt generation on match.
– Stop timer on match with optional interrupt generation.
– Reset timer on match with optional interrupt generation.
• Supports single edge controlled and/or double edge controlled PWM outputs. Single
edge controlled PWM outputs all go high at the beginning of each cycle unless the
output is a constant low. Double edge controlled PWM outputs can have either edge
occur at any position within a cycle. This allows for both positive going and negative
going pulses.
• Pulse period and width can be any number of timer counts. This allows complete
flexibility in the trade-off between resolution and repetition rate. All PWM outputs will
occur at the same repetition rate.
• Double edge controlled PWM outputs can be programmed to be either positive going
or negative going pulses.
• Match register updates are synchronized with pulse outputs to prevent generation of
erroneous pulses. Software must "release" new match values before they can
become effective.
• May be used as a standard timer if the PWM mode is not enabled.
• A 32-bit Timer/Counter with a programmable 32-bit prescaler.
• Two 32-bit capture channels take a snapshot of the timer value when an input signal
transitions. A capture event may also optionally generate an interrupt.
UM10360
Chapter 24: LPC176x/5x Pulse Width Modulator (PWM)
Rev. 3 — 19 December 2013 User manual