UM10360 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
User manual Rev. 3 — 19 December 2013 323 of 841
NXP Semiconductors
UM10360
Chapter 15: LPC176x/5x UART1
15.4.4 UART1 Interrupt Enable Register (U1IER - 0x4001 0004, when
DLAB = 0)
The U1IER is used to enable the four UART1 interrupt sources.
Table 292: UART1 Divisor Latch LSB Register (U1DLL - address 0x4001 0000 when DLAB = 1) bit description
Bit Symbol Description Reset Value
7:0 DLLSB The UART1 Divisor Latch LSB Register, along with the U1DLM register, determines the
baud rate of the UART1.
0x01
31:8 - Reserved, user software should not write ones to reserved bits. The value read from a
reserved bit is not defined.
NA
Table 293: UART1 Divisor Latch MSB Register (U1DLM - address 0x4001 0004 when DLAB = 1) bit description
Bit Symbol Description Reset Value
7:0 DLMSB The UART1 Divisor Latch MSB Register, along with the U1DLL register, determines the
baud rate of the UART1.
0x00
31:8 - Reserved, user software should not write ones to reserved bits. The value read from a
reserved bit is not defined.
NA
Table 294: UART1 Interrupt Enable Register (U1IER - address 0x4001 0004 when DLAB = 0) bit description
Bit Symbol Value Description Reset
Value
0RBR
Interrupt
Enable
enables the Receive Data Available interrupt for UART1. It also controls the Character
Receive Time-out interrupt.
0
0 Disable the RDA interrupts.
1 Enable the RDA interrupts.
1THRE
Interrupt
Enable
enables the THRE interrupt for UART1. The status of this interrupt can be read from
U1LSR[5].
0
0 Disable the THRE interrupts.
1 Enable the THRE interrupts.
2 RX Line
Interrupt
Enable
enables the UART1 RX line status interrupts. The status of this interrupt can be read
from U1LSR[4:1].
0
0 Disable the RX line status interrupts.
1 Enable the RX line status interrupts.
3 Modem
Status
Interrupt
Enable
enables the modem interrupt. The status of this interrupt can be read from U1MSR[3:0]. 0
0 Disable the modem interrupt.
1 Enable the modem interrupt.
6:4 - Reserved, user software should not write ones to reserved bits. The value read from a
reserved bit is not defined.
NA
7CTS
Interrupt
Enable
If auto-cts mode is enabled this bit enables/disables the modem status interrupt
generation on a CTS1 signal transition. If auto-cts mode is disabled a CTS1 transition
will generate an interrupt if Modem Status Interrupt Enable (U1IER[3]) is set.
In normal operation a CTS1 signal transition will generate a Modem Status Interrupt
unless the interrupt has been disabled by clearing the U1IER[3] bit in the U1IER
register. In auto-cts mode a transition on the CTS1 bit will trigger an interrupt only if both
the U1IER[3] and U1IER[7] bits are set.
0
0 Disable the CTS interrupt.
1 Enable the CTS interrupt.
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