UM10360 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
User manual Rev. 3 — 19 December 2013 32 of 841
NXP Semiconductors
UM10360
Chapter 4: LPC176x/5x Clocking and power control
4.3 Oscillators
The LPC176x/5x includes three independent oscillators. These are the Main Oscillator,
the Internal RC Oscillator, and the RTC oscillator. Each oscillator can be used for more
than one purpose as required in a particular application. This can be seen in Figure 7
.
Following Reset, the LPC176x/5x will operate from the Internal RC Oscillator until
switched by software. This allows systems to operate without any external crystal, and
allows the boot loader code to operate at a known frequency.
4.3.1 Internal RC oscillator
The Internal RC Oscillator (IRC) may be used as the clock source for the watchdog timer,
and/or as the clock that drives PLL0 and subsequently the CPU. The precision of the IRC
does not allow for use of the USB interface, which requires a much more precise time
base in order to comply with the USB specification. Also, the IRC should not be used with
the CAN1/2 block if the CAN baud rate is higher than 100 kbit/s.The nominal IRC
frequency is 4 MHz.
Upon power-up or any chip reset, the LPC176x/5x uses the IRC as the clock source.
Software may later switch to one of the other available clock sources.
4.3.2 Main oscillator
The main oscillator can be used as the clock source for the CPU, with or without using
PLL0. The main oscillator operates at frequencies of 1 MHz to 25 MHz. This frequency
can be boosted to a higher frequency, up to the maximum CPU operating frequency, by
the Main PLL (PLL0). The oscillator output is called OSC_CLK. The clock selected as the
PLL0 input is PLLCLKIN and the ARM processor clock frequency is referred to as CCLK
for purposes of rate equations, etc. elsewhere in this document. The frequencies of
PLLCLKIN and CCLK are the same value unless the PLL0 is active and connected. Refer
to Section 4.5 “
PLL0 (Phase Locked Loop 0)” for details.
The on-board oscillator in the LPC176x/5x can operate in one of two modes: slave mode
and oscillation mode.
In slave mode the input clock signal should be coupled by means of a capacitor of 100 pF
(C
C
in Figure 8, drawing a), with an amplitude between 200 mVrms and 1000 mVrms.
This corresponds to a square wave signal with a signal swing of between 280 mV and 1.4
V. The XTAL2 pin in this configuration can be left unconnected.
External components and models used in oscillation mode are shown in Figure 8
,
drawings b and c, and in Table 15
and Table 16. Since the feedback resistance is
integrated on chip, only a crystal and the capacitances C
X1
and C
X2
need to be connected
externally in case of fundamental mode oscillation (the fundamental frequency is
represented by L, C
L
and R
S
). Capacitance C
P
in Figure 8, drawing c, represents the
parallel package capacitance and should not be larger than 7 pF. Parameters F
C
, C
L
, R
S
and C
P
are supplied by the crystal manufacturer.
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