UM10360 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
User manual Rev. 3 — 20 December 2013 654 of 841
NXP Semiconductors
UM10360
Chapter 34: Appendix: Cortex-M3 user guide
Remark: In the constants shown above,
X
and
Y
are hexadecimal digits.
In addition, in a small number of instructions,
constant
can take a wider range of values.
These are described in the individual instruction descriptions.
When an Operand2 constant is used with the instructions
MOVS
,
MVNS
,
ANDS
,
ORRS
,
ORNS
,
EORS
,
BICS
,
TEQ
or
TST
, the carry flag is updated to bit[31] of the constant, if the constant is greater
than 255 and can be produced by shifting an 8-bit value. These instructions do not affect
the carry flag if Operand2 is any other constant.
Instruction substitution: Your assembler might be able to produce an equivalent
instruction in cases where you specify a constant that is not permitted. For example, an
assembler might assemble the instruction
CMP Rd, #0xFFFFFFFE
as the equivalent
instruction
CMN Rd, #0x2
.
34.2.3.3.2 Register with optional shift
You specify an Operand2 register in the form:
Rm {, shift}
where:
Rm is the register holding the data for the second operand.
shift is an optional shift to be applied to Rm. It can be one of:
ASR#n: arithmetic shift right n bits, 1 n 32.
LSL#n: logical shift left n bits, 1 n 31.
LSR#n: logical shift right n bits, 1 n 32.
ROR#n: rotate right n bits, 1 n 31.
RRX: rotate right one bit, with extend.
—: if omitted, no shift occurs, equivalent to LSL#0.
If you omit the shift, or specify LSL #0, the instruction uses the value in Rm.
If you specify a shift, the shift is applied to the value in Rm, and the resulting 32-bit value
is used by the instruction. However, the contents in the register Rm remains unchanged.
Specifying a register with shift also updates the carry flag when used with certain
instructions. For information on the shift operations and how they affect the carry flag, see
Section 34.2.3.4 “
Shift Operations”
34.2.3.4 Shift Operations
Register shift operations move the bits in a register left or right by a specified number of
bits, the shift length. Register shift can be performed:
• directly by the instructions
ASR
,
LSR
,
LSL
,
ROR
, and
RRX
, and the result is written to a
destination register
• during the calculation of Operand2 by the instructions that specify the second
operand as a register with shift, see Section 34.2.3.3
. The result is used by the
instruction.
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