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NXP Semiconductors LPC1768 - Memory Map after any Reset; Criterion for Valid User Code

NXP Semiconductors LPC1768
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UM10360 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
User manual Rev. 3 — 19 December 2013 617 of 841
NXP Semiconductors
UM10360
Chapter 32: LPC176x/5x Flash memory interface and programming
A hardware flash signature generation capability is built into the flash memory. this feature
can be used to create a signature that can then be used to verify flash contents. Details of
flash signature generation are in Section 32.10
.
32.3.1 Memory map after any reset
When a user program begins execution after reset, the interrupt vectors are set to point to
the beginning of flash memory.
32.3.1.1 Criterion for Valid User Code
The reserved Cortex-M3 exception vector location 7 (offset 0x 001C in the vector table)
should contain the 2’s complement of the check-sum of table entries 0 through 6. This
causes the checksum of the first 8 table entries to be 0. The boot loader code checksums
the first 8 locations in sector 0 of the flash. If the result is 0, then execution control is
transferred to the user code.
If the signature is not valid, the auto-baud routine synchronizes with the host via serial port
0. The host should send a “?” (0x3F) as a synchronization character and wait for a
response. The host side serial port settings should be 8 data bits, 1 stop bit and no parity.
The auto-baud routine measures the bit time of the received synchronization character in
terms of its own frequency and programs the baud rate generator of the serial port. It also
Fig 136. Map of lower memory

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