DocID024597 Rev 3 1027/1693
RM0351 Low-power timer (LPTIM)
1045
30.4.6 Operating mode
The LPTIM features two operating modes:
• The Continuous mode: the timer is free running, the timer is started from a trigger event
and never stops until the timer is disabled
• One shot mode: the timer is started from a trigger event and stops when reaching the
ARR value.
A new trigger event will re-start the timer. Any trigger event occurring after the counter starts
and before the counter reaches ARR will be discarded.
To enable the one shot counting, the SNGSTRT bit must be set.
In case an external trigger is selected, each external trigger event arriving after the
SNGSTRT bit is set, and after the counter register has stopped (contains zero value), will
start the counter for a new One-shot counting cycle as shown in Figure 342.
Figure 342. LPTIM output waveform, Single counting mode configuration
It should be noted that when the WAVE bit-field in the LPTIMx_CFGR register is set, the
Set-once mode is activated. In this case, the counter is only started once following the first
trigger, and any subsequent trigger event is discarded as shown in Figure 342.
Figure 343. LPTIM output waveform, Single counting mode configuration
and Set-once mode activated (WAVE bit is set)
In case of software start (TRIGEN[1:0] = ‘00’), the SNGSTRT setting will start the counter for
one shot counting.
To enable the continuous counting, the CNTSTRT bit must be set.
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