DocID024597 Rev 3 1081/1693
RM0351 Real-time clock (RTC)
1106
34.6 RTC registers
Refer to Section 1.1 on page 61 of the reference manual for a list of abbreviations used in
register descriptions.
The peripheral registers can be accessed by words (32-bit).
34.6.1 RTC time register (RTC_TR)
The RTC_TR is the calendar time shadow register. This register must be written in
initialization mode only. Refer to Calendar initialization and configuration on page 1070 and
Reading the calendar on page 1071.
This register is write protected. The write access procedure is described in RTC register
write protection on page 1070.
Address offset: 0x00
Backup domain reset value: 0x0000 0000
System reset: 0x0000 0000 when BYPSHAD = 0. Not affected when BYPSHAD = 1.
Table 173. Interrupt control bits
Interrupt event Event flag
Enable
control
bit
Exit from
Sleep
mode
Exit from
Stop
mode
Exit from
Standby
mode
Alarm A ALRAF ALRAIE yes yes
(1)
1. Wakeup from STOP and Standby modes is possible only when the RTC clock source is LSE or LSI.
yes
(1)
Alarm B ALRBF ALRBIE yes yes
(1)
yes
(1)
RTC_TS input (timestamp) TSF TSIE yes yes
(1)
yes
(1)
RTC_TAMP1 input detection TAMP1F TAMPIE yes yes
(1)
yes
(1)
RTC_TAMP2 input detection TAMP2F TAMPIE yes yes
(1)
yes
(1)
RTC_TAMP3 input detection TAMP3F TAMPIE yes yes
(1)
yes
(1)
Wakeup timer interrupt WUTF WUTIE yes yes
(1)
yes
(1)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. PM HT[1:0] HU[3:0]
rw rw rw rw rw rw rw
1514131211109876543210
Res. MNT[2:0] MNU[3:0] Res. ST[2:0] SU[3:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31-23 Reserved, must be kept at reset value
Bit 22 PM: AM/PM notation
0: AM or 24-hour format
1: PM
Bits 21:20 HT[1:0]: Hour tens in BCD format
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