ST STM32L4x6 User Manual

DocID024597 Rev 3 579/1693
RM0351 Comparator (COMP)
588
19.3.3 COMP reset and clocks
The COMP clock provided by the clock controller is synchronous with the APB2 clock.
There is no clock enable control bit provided in the RCC controller. Reset and clock enable
bits are common for COMP and SYSCFG.
Note: Important: The polarity selection logic and the output redirection to the port works
independently from the APB2 clock. This allows the comparator to work even in Stop mode.
19.3.4 Comparator LOCK mechanism
The comparators can be used for safety purposes, such as over-current or thermal
protection. For applications having specific functional safety requirements, it is necessary to
insure that the comparator programming cannot be altered in case of spurious register
access or program counter corruption.
¾ V
REFINT
010
V
REFINT
011
DAC Channel1 100
DAC Channel2 101
PB1 110
PC4 111
Table 111. COMP2 input plus assignment
COMP2_INP COMP2_INPSEL
PB4 0
PB6 1
Table 112. COMP2 input minus assignment
COMP2_INM COMP2_INMSEL[2:0]
¼ V
REFINT
000
½ V
REFINT
001
¾ V
REFINT
010
V
REFINT
011
DAC Channel1 100
DAC Channel2 101
PB3 110
PB7 111
Table 110. COMP1 input minus assignment (continued)
COMP1_INM COMP1_INMSEL[2:0]

ST STM32L4x6 Specifications

General

Brand	ST
Model	STM32L4x6
Category	Microcontrollers
Language	English