ST STM32L4x6

Direct memory access controller (DMA) RM0351
304/1693 DocID024597 Rev 3
Figure 25. DMA2 request mapping
069
+LJKSULRULW\
/RZSULRULW\
'0$B&6(/5
6$,B$8$57B7;63,B5;
6:30,B5;7,0B&+7,0B75,*
7,0B&20$(6B,17,0B&+7,0B83
6:WULJJHU0(00(0ELW
&6
&KDQQHO'0$B5(4
&KDQQHO'0$B5(4
6$,B%8$57B5;63,B7;
6:30,B7;7,0B&+7,0B83
$(6B2877,0B&+7,0B75,*
7,0B&20
6:WULJJHU0(00(0ELW
&6
&KDQQHO'0$B5(4
$'&6$,B$8$57B7;63,B5;
$(6B287
6:WULJJHU0(00(0ELW
&6
&KDQQHO'0$B5(4
$'&6$,B%7,0B83'$&63,B7;
7,0B&+6'00&
6:WULJJHU0(00(0ELW
&6
&KDQQHO'0$B5(4
$'&8$57B5;7,0B83'$&
7,0B&+$(6B,16'00&
6:WULJJHU0(00(0ELW
&6
&KDQQHO'0$B5(4
6$,B$86$57B7;/38$57B7;
,&B5;7,0B&+
6:WULJJHU0(00(0ELW
&6
&KDQQHO'0$B5(4
6$,B%86$57B5;48$'63,
/38$57B5;,&B7;7,0B&+
6:WULJJHU0(00(0ELW
&6
3HULSKHUDOUHTXHVWVLJQDOV )L[HGKDUGZDUHSULRULW\
,QWHUQDO'0$
UHTXHVW
'0$FKDQQHO