ST STM32L4x6 User Manual

Reset and clock control (RCC) RM0351
222/1693 DocID024597 Rev 3
6.4.14 APB1 peripheral reset register 2 (RCC_APB1RSTR2)
Address offset: 0x3C
Reset value: 0x00000 0000
Access: no wait state, word, half-word and byte access
Bit 3 TIM5RST: TIM5 timer reset
Set and cleared by software.
0: No effect
1: Reset TIM5
Bit 2 TIM4RST: TIM3 timer reset
Set and cleared by software.
0: No effect
1: Reset TIM3
Bit 1 TIM3RST: TIM3 timer reset
Set and cleared by software.
0: No effect
1: Reset TIM3
Bit 0 TIM2RST: TIM2 timer reset
Set and cleared by software.
0: No effect
1: Reset TIM2
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
LPTIM2
RST
Res. Res.
SWP
MI1
RST
Res.
LP
UART1
RST
rw rw rw
Bits 31:6 Reserved, must be kept at reset value.
Bit 5 LPTIM2RST: Low-power timer 2 reset
Set and cleared by software.
0: No effect
1: Reset LPTIM2
Bits 4:3 Reserved, must be kept at reset value.
Bit 2 SWPMI1RST: Single wire protocol reset
Set and cleared by software.
0: No effect
1: Reset SWPMI1
Bit 1 Reserved, must be kept at reset value.
Bit 0 LPUART1RST: Low-power UART 1 reset
Set and cleared by software.
0: No effect
1: Reset LPUART1

ST STM32L4x6 Specifications

General

Brand	ST
Model	STM32L4x6
Category	Microcontrollers
Language	English