System window watchdog (WWDG) RM0351
1056/1693 DocID024597 Rev 3
33 System window watchdog (WWDG)
33.1 Introduction
The system window watchdog (WWDG) is used to detect the occurrence of a software fault,
usually generated by external interference or by unforeseen logical conditions, which
causes the application program to abandon its normal sequence. The watchdog circuit
generates an MCU reset on expiry of a programmed time period, unless the program
refreshes the contents of the downcounter before the T6 bit becomes cleared. An MCU
reset is also generated if the 7-bit downcounter value (in the control register) is refreshed
before the downcounter has reached the window register value. This implies that the
counter must be refreshed in a limited window.
The WWDG clock is prescaled from the APB clock and has a configurable time-window that
can be programmed to detect abnormally late or early application behavior.
The WWDG is best suited for applications which require the watchdog to react within an
accurate timing window.
33.2 WWDG main features
• Programmable free-running downcounter
• Conditional reset
– Reset (if watchdog activated) when the downcounter value becomes less than
0x40
– Reset (if watchdog activated) if the downcounter is reloaded outside the window
(see Figure 350)
• Early wakeup interrupt (EWI): triggered (if enabled and the watchdog activated) when
the downcounter is equal to 0x40.
33.3 WWDG functional description
If the watchdog is activated (the WDGA bit is set in the WWDG_CR register) and when the
7-bit downcounter (T[6:0] bits) rolls over from 0x40 to 0x3F (T6 becomes cleared), it initiates
a reset. If the software reloads the counter while the counter is greater than the value stored
in the window register, then a reset is generated.
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