ST STM32L4x6 User Manual

Revision history RM0351
1688/1693 DocID024597 Rev 3
46 Revision history
Table 281. Document revision history
Date Revision Changes
28-May-2015 1 Initial release.
15-Oct-2015 2
PWR
Updated Section 5.1: Power supplies.
Updated Section : Entering low power mode.
Updated Table 22: Sleep.
Updated Table 23: Low-power sleep.
Updated Table 24: Stop 0 mode.
Updated Table 26: Stop 2 mode.
Updated Table 27: Standby mode.
Updated Table 28: Shutdown mode.
Renamed bit EIWF into EIWUL in Section 5.4.3: Power
control register 3 (PWR_CR3).
GPIO
Updated OSPEEDy[1:0] definition in Section 7.4.3:
GPIO port output speed register (GPIOx_OSPEEDR) (x
= A..H).
FMC
Updated Section : SRAM/NOR-Flash chip-select timing
registers 1..4 (FMC_BTR1..4).
Updated Section : SRAM/NOR-Flash write timing
registers 1..4 (FMC_BWTR1..4).
ADC
Updated Figure 62: ADC3 connectivity.
Updated Section 16.3.17: Stopping an ongoing
conversion (ADSTP, JADSTP).
Added formula in Bullet.
VREFBUF
Updated Table 107: VREFBUF buffer modes.
DFSDM
Updated clock range in Section : SPI data input format
operation and Section : Manchester coded data input
format operation.
LCD
Updated Section 22.2: LCD main features.
TSC
Updated Table 135: Spread spectrum deviation versus
AHB clock frequency.
Updated Table 137: Effect of low-power modes on TSC.
TIM2/TIM3/TIM4/TIM5
Updated Bullet in Section 27.3.13: One-pulse mode.

ST STM32L4x6 Specifications

General

Brand	ST
Model	STM32L4x6
Category	Microcontrollers
Language	English