System configuration controller (SYSCFG) RM0351
284/1693 DocID024597 Rev 3
System reset value: 0x0000 0000
8.2.10 SYSCFG SRAM2 key register (SYSCFG_SKR)
Address offset: 0x24
System reset value: 0x0000 0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
P31WP P30WP P29WP P28WP P27WP P26WP P25WP P24WP P23WP P22WP P21WP P20WP P19WP P18WP P17WP P16WP
rs rs rs rs rs rs rs rs rs rs rs rs rs rs rs rs
1514131211109876543210
P15WP P14WP P13WP P12WP P11WP P10WP P9WP P8WP P7WP P6WP P5WP P4WP P3WP P2WP P1WP P0WP
rs rs rs rs rs rs rs rs rs rs rs rs rs rs rs rs
Bits 31:0 PxWP (x= 0 to 31): SRAM2 page x write protection
These bits are set by software and cleared only by a system reset.
0: Write protection of SRAM2 page x is disabled.
1: Write protection of SRAM2 page x is enabled.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res Res Res Res Res Res Res Res Res Res Res Res Res Res Res Res
1514131211109876543210
Res Res Res Res Res Res Res Res KEY[7:0]
wwwwwwww
Bits 31:8 Reserved, must be kept at reset value
Bits 7:0 KEY[7:0]: SRAM2 write protection key for software erase
The following steps are required to unlock the write protection of the SRAM2ER
bit in the SYSCFG_CFGR2 register.
1. Write "0xCA” into Key[7:0]
2. Write "0x53” into Key[7:0]
Writing a wrong key reactivates the write protection.
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