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DocID024597 Rev 3 851/1693

RM0351 Advanced-control timers (TIM1/TIM8)

856

Note: Refer to Figure 232: Break and Break2 circuitry overview.

26.4.30 TIM1 register map

TIM1 registers are mapped as 16-bit addressable registers as described in the table below:

Bit 1 BK2CMP1E: BRK2 COMP1 enable

This bit enables the COMP1 for the timer’s BRK2 input. COMP1 output is ‘ORed’ with the

other BRK2 sources.

0: COMP1 input disabled

1: COMP1 input enabled

Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK

bits in TIMx_BDTR register).

Bit 0 BK2INE: BRK2 BKIN input enable

This bit enables the BKIN2 alternate function input for the timer’s BRK2 input. BKIN2 input is

‘ORed’ with the other BRK2 sources.

0: BKIN2 input disabled

1: BKIN2 input enabled

Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK

bits in TIMx_BDTR register).

Table 150. TIM1 register map and reset values

Offset Register

0x00

TIM1_CR1

Res

UIFREMAP

Res

CKD

[1:0]

ARPE

CMS

[1:0]

DIR

OPM

URS

UDIS

CEN

Reset value 0 0000000000

0x04

TIM1_CR2

Res

MMS2[3:0]

Res

OIS6

Res

OIS5

Res

OIS4

OIS3N

OIS3

OIS2N

OIS2

OIS1N

OIS1

TI1S

MMS

[2:0]

CCDS

CCUS

Res

CCPC

Reset value 0000 0 0 0000000000000 0

0x08

TIM1_SMCR

Res

SMS[3]

ETP

ECE

ETP

[1:0]

ETF[3:0]

MSM

TS[2:0]

OCCS

SMS[2:0]

Reset value 00000000000000000

0x0C

TIM1_DIER

Res

TDE

COMDE

CC4DE

CC3DE

CC2DE

CC1DE

UDE

BIE

TIE

COMIE

CC4IE

CC3IE

CC2IE

CC1IE

UIE

Reset value 000000000000000

0x10

TIM1_SR

Res

C6IF

C5IF

Res

SBIF

CC4OF

CC3OF

CC2OF

CC1OF

B2IF

BIF

TIF

COMIF

CC4IF

CC3IF

CC2IF

CC1IF

UIF

Reset value 00 00000000000000

0x14

TIM1_EGR

Res

B2G

COM

CC4G

CC3G

CC2G

CC1G

Reset value 000000000

Brand	ST
Model	STM32L4x6
Category	Microcontrollers
Language	English

ST STM32L4x6 User Manual

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