DocID024597 Rev 3 293/1693
RM0351 Peripherals interconnect matrix
294
9.3.13 From comparators (COMP1/COMP2) to timers
(TIM1/TIM2/TIM3/TIM8/TIM15/TIM16/TIM17)
Purpose
Comparators (COMP1/COMP2) output values can be connected to timers
(TIM1/TIM2/TIM3/TIM8/TIM15/TIM16/TIM17) input captures or TIMx_ETR signals.
The connection to ETR is described in Section 26.3.4: External trigger input.
Comparators (COMP1/COMP2) output values can also generate break input signals for
timers (TIM1/TIM8) on input pins TIMx_BKIN or TIMx_BKIN2 through GPIO alternate
function selection using open drain connection of IO, see Section 26.3.17: Bidirectional
break inputs.
The possible connections are given in:
• Section 26.4.21: TIM1 option register 1 (TIM1_OR1)
• Section 26.4.22: TIM8 option register 1 (TIM8_OR1)
• Section 26.4.26: TIM1 option register 2 (TIM1_OR2)
• Section 26.4.28: TIM8 option register 2 (TIM8_OR2)
• Section 27.4.19: TIM2 option register 1 (TIM2_OR1)
• Section 27.4.20: TIM3 option register 1 (TIM3_OR1)
• Section 27.4.21: TIM2 option register 2 (TIM2_OR2)
• Section 27.4.22: TIM3 option register 2 (TIM3_OR2)
• Section 28.3: TIM16 and TIM17 main features
Active power mode
Run, Sleep, Low-power run, Low-power sleep.
9.3.14 From system errors to timers (TIM1/TIM8/TIM15/TIM16/TIM17)
Purpose
CSS, CPU hardfault, RAM parity error, FLASH ECC double error detection, PVD can
generate system errors in the form of timer break toward timers
(TIM1/TIM8/TIM15/TIM16/TIM17).
The purpose of the break function is to protect power switches driven by PWM signals
generated by the timers.
List of possible source of break are described in:
• Section 26.3.16: Using the break function (TIM1/TIM8)
• Section 28.4.13: Using the break function (TIM15/TIM16/TIM17)
• Section Figure 298.: TIM15 block diagram
• Section Figure 299.: TIM16 and TIM17 block diagram
Active power mode
Run, Sleep, Low-power run, Low-power sleep.
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