DocID024597 Rev 3 795/1693
RM0351 Advanced-control timers (TIM1/TIM8)
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Figure 235. PWM output state following BRK assertion (OSSI=0)
26.3.17 Bidirectional break inputs
Beside regular digital break inputs and internal break events coming from the comparators,
the timer 1 and 8 are featuring bidirectional break inputs/outputs combining the two sources,
as represented on Figure 236.
The TIMx_BKINy_COMPz pins are combining the COMPz output (to be configured in open
drain) and the Timerx’s TIMx_BKINy input. They allow to have:
- A global break information available for external MCUs or gate drivers shut down inputs,
with a single-pin.
- An internal comparator and multiple external open drain comparators outputs ORed
together and triggering a break event, when the multiple internal and external break inputs
must be merged.
Figure 236. Output redirection
26.3.18 Clearing the OCxREF signal on an external event
The OCxREF signal of a given channel can be cleared when a high level is applied on the
OCREF_CLR_INPUT (OCxCE enable bit in the corresponding TIMx_CCMRx register
set to 1). OCxREF remains low until the next update event (UEV) occurs. This function can
only be used in Output compare and PWM modes. It does not work in Forced mode.
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