Low-power timer (LPTIM) RM0351
1034/1693 DocID024597 Rev 3
30.6 LPTIM interrupts
The following events generate an interrupt/wake-up event, if they are enabled through the
LPTIMx_IER register:
• Compare match
• Auto-reload match (whatever the direction if encoder mode)
• External trigger event
• Autoreload register write completed
• Compare register write completed
• Direction change (encoder mode), programmable (up / down / both).
Note: if any bit in the LPTIMx_IER register (Interrupt Enable Register) is set after that its
corresponding flag in the LPTIMx_ISR register (Status Register) is set, the interrupt is not
asserted
To Next Page
Loading...
Need help?
General
