ST STM32L4x6 User Manual

DocID024597 Rev 3 157/1693
RM0351 Power control (PWR)
178
5.3.9 Standby mode
The Standby mode allows to achieve the lowest power consumption with BOR. It is based
on the Cortex
®
-M4 deepsleep mode, with the voltage regulators disabled (except when
SRAM2 content is preserved). The PLL, the HSI16, the MSI and the HSE oscillators are
also switched off.
SRAM1 and register contents are lost except for registers in the Backup domain and
Standby circuitry (see Figure 7). SRAM2 content can be preserved if the bit RRS is set in
the PWR_CR3 register. In this case the Low-power regulator is ON and provides the supply
to SRAM2 only.
The BOR is always available in Standby mode. The consumption is increased when
thresholds higher than V
BOR0
are used.
I/O states in Standby mode
In the Standby mode, the I/Os can be configured either with a pull-up (refer to PWR_PUCRx
registers (x=A,B,C,D,E,F,G,H)), or with a pull-down (refer to PWR_PDCRx registers
(x=A,B,C,D,E,F,G,H)), or can be kept in analog state.
The RTC outputs on PC13 are functional in Standby mode. PC14 and PC15 used for LSE
are also functional. 5 wakeup pins (WKUPx, x=1,2...5) and the 3 RTC tampers are available.
Entering Standby mode
The Standby mode is entered according Section : Entering low power mode, when the
SLEEPDEEP bit in the Cortex
®
-M4 System Control register is set.
Refer to Table 27: Standby mode for details on how to enter Standby mode.
In Standby mode, the following features can be selected by programming individual control
bits:
• Independent watchdog (IWDG): the IWDG is started by writing to its Key register or by
hardware option. Once started it cannot be stopped except by a reset. See
Section 32.3: IWDG functional description in Section 32: Independent watchdog
(IWDG).
• real-time clock (RTC): this is configured by the RTCEN bit in the Backup domain
control register (RCC_BDCR)
• Internal RC oscillator (LSI): this is configured by the LSION bit in the Control/status
register (RCC_CSR).
• External 32.768 kHz oscillator (LSE): this is configured by the LSEON bit in the Backup
domain control register (RCC_BDCR)
Exiting Standby mode
The Standby mode is exit according Section : Entering low power mode. The SBF status
flag in the Power control register 3 (PWR_CR3) indicates that the MCU was in Standby
mode. All registers are reset after wakeup from Standby except for Power control register 3
(PWR_CR3).
Refer to Table 27: Standby mode for more details on how to exit Standby mode.

ST STM32L4x6 Specifications

General

Brand	ST
Model	STM32L4x6
Category	Microcontrollers
Language	English