ST STM32L4x6 User Manual

DocID024597 Rev 3 217/1693
RM0351 Reset and clock control (RCC)
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6.4.11 AHB2 peripheral reset register (RCC_AHB2RSTR)
Address offset: 0x2C
Reset value: 0x00000 0000
Access: no wait state, word, half-word and byte access
Bits 7:2 Reserved, must be kept at reset value.
Bit 1 DMA2RST: DMA2 reset
Set and cleared by software.
0: No effect
1: Reset DMA2
Bit 0 DMA1RST: DMA1 reset
Set and cleared by software.
0: No effect
1: Reset DMA1
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
RNG
RST
Res.
AES
RST
rw rw
1514131211109 8 76543210
Res. Res.
ADC
RST
OTGFS
RST
Res. Res. Res. Res.
GPIOH
RST
GPIOG
RST
GPIOF
RST
GPIOE
RST
GPIOD
RST
GPIOC
RST
GPIOB
RST
GPIOA
RST
rw rw rw rw rw rw rw rw rw
Bits 31:19 Reserved, must be kept at reset value.
Bit 18 RNGRST: Random number generator reset
Set and cleared by software.
0: No effect
1: Reset RNG
Bit 17 Reserved, must be kept at reset value.
Bit 16 AESRST: AES hardware accelerator reset
Set and cleared by software.
0: No effect
1: Reset AES
Bits 15:14 Reserved, must be kept at reset value.
Bit 13 ADCRST: ADC reset
Set and cleared by software.
0: No effect
1: Reset ADC interface
Bit 12 OTGFSRST: USB OTG FS reset
Set and cleared by software.
0: No effect
1: Reset USB OTG FS
Bits 11:8 Reserved, must be kept at reset value.

ST STM32L4x6 Specifications

General

Brand	ST
Model	STM32L4x6
Category	Microcontrollers
Language	English