Low-power timer (LPTIM) RM0351
1040/1693 DocID024597 Rev 3
Caution: The LPTIMx_CFGR register must only be modified when the LPTIM is disabled (ENABLE
bit is reset to ‘0’).
Bits 4:3 CKFLT: Configurable digital filter for external clock
The CKFLT value sets the number of consecutive equal samples that should be detected when a level
change occurs on an external clock signal before it is considered as a valid level transition. An internal
clock source must be present to use this feature
00: any external clock signal level change is considered as a valid transition
01: external clock signal level change must be stable for at least 2 clock periods before it is
considered as valid transition.
10: external clock signal level change must be stable for at least 4 clock periods before it is
considered as valid transition.
11: external clock signal level change must be stable for at least 8 clock periods before it is
considered as valid transition.
Bits 2:1 CKPOL: Clock Polarity
If LPTIM is clocked by an external clock source:
When the LPTIM is clocked by an external clock source, CKPOL bits is used to configure the active
edge or edges used by the counter:
00: the rising edge is the active edge used for counting
01: the falling edge is the active edge used for counting
10: both edges are active edges. When both external clock signal’s edges are considered active
ones, the LPTIM must also be clocked by an internal clock source with a frequency equal to at
least four time the external clock frequency.
11: not allowed
If the LPTIM is configured in Encoder mode (ENC bit is set):
00: the encoder sub-mode 1 is active
01: the encoder sub-mode 2 is active
10: the encoder sub-mode 3 is active
Refer to Section 30.4.12: Encoder mode for more details about Encoder mode sub-modes.
Bit 0 CKSEL: Clock selector
The CKSEL bit selects which clock source the LPTIM will use:
0: LPTIM is clocked by internal clock source (APB clock or any of the embedded oscillators)
1: LPTIM is clocked by an external clock source through the LPTIM external Input1
Table 166. LPTIM external trigger connection
TRIGSEL External trigger
ext_trig0 GPIO
ext_trig1 RTC alarm A
ext_trig2 RTC alarm B
ext_trig3 RTC_TAMP1 input detection
ext_trig4 RTC_TAMP2 input detection
ext_trig5 RTC_TAMP3 input detection
ext_trig6 COMP1_OUT
ext_trig7 COMP2_OUT
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