ST STM32L4x6 User Manual

DocID024597 Rev 3 419/1693
RM0351 Quad-SPI interface (QUADSPI)
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15.5.5 QUADSPI data length register (QUADSPI_DLR)
Address offset: 0x0010
Reset value: 0x0000 0000
15.5.6 QUADSPI communication configuration register (QUADSPI_CCR)
Address offset: 0x0014
Reset value: 0x0000 0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
DL[31:16]
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15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
DL[15:0]
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Bits 31:0 DL[31: 0]: Data length
Number of data to be retrieved (value+1) in indirect and status-polling modes. A value
no greater than 3 (indicating 4 bytes) should be used for status-polling mode.
All 1s in indirect mode means undefined length, where QUADSPI will continue until the
end of memory, as defined by FSIZE.
0x0000_0000: 1 byte is to be transferred
0x0000_0001: 2 bytes are to be transferred
0x0000_0002: 3 bytes are to be transferred
0x0000_0003: 4 bytes are to be transferred
...
0xFFFF_FFFD: 4,294,967,294 (4G-2) bytes are to be transferred
0xFFFF_FFFE: 4,294,967,295 (4G-1) bytes are to be transferred
0xFFFF_FFFF: undefined length -- all bytes until the end of Flash memory (as defined
by FSIZE) are to be transferred. Continue reading indefinitely if FSIZE = 0x1F.
This field has no effect when in memory-mapped mode (FMODE = 10).
This field can be written only when BUSY = 0.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
DDRM Res. Res. SIOO FMODE[1:0] DMODE Res. DCYC[4:0] ABSIZE
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15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ABMODE ADSIZE ADMODE IMODE INSTRUCTION[7:0]
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ST STM32L4x6 Specifications

General

Brand	ST
Model	STM32L4x6
Category	Microcontrollers
Language	English