ST STM32L4x6

Analog-to-digital converters (ADC) RM0351
490/1693 DocID024597 Rev 3
Figure 113. Interleaved mode on 1 channel in continuous conversion mode: dual ADC
mode
Figure 114. Interleaved mode on 1 channel in single conversion mode: dual ADC
mode
If DISCEN=1, each “n” simultaneous conversions (“n” is defined by DISCNUM) of the
regular sequence require a regular trigger event to occur.
In this mode, injected conversions are supported. When injection is done (either on master
or on slave), both the master and the slave regular conversions are aborted and the
sequence is re-started from the master (see Figure 115 below).
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