EasyManuals Logo

ST STM32L4x6 User Manual

ST STM32L4x6
1693 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #1378 background imageLoading...
Page #1378 background image
Single Wire Protocol Master Interface (SWPMI) RM0351
1378/1685 DocID024597 Rev 3
Any further write to the SWPMI_TDR register while TXUNRF is set will be ignored. The user
must set CTXUNRF bit in the SWPMI_ICR register to clear TXUNRF flag.
Overrun during payload reception
During the reception of the frame payload, a receive overrun is indicated by RXOVRF flag in
the SWPMI_ISR register. If a receive overrun occurs, the SWPMI does not update
SWPMI_RDR with the incoming data. The incoming data will be lost.
The reception carries on up to the EOF and, if the overrun condition disappears, the RXBFF
flag is set. When RXBFF flag is set, the user can check the RXOVRF flag. The user must set
CRXOVRF bit in the SWPMI_ICR register to clear RXBOVRF flag.
If the user wants to detect the overrun immediately, RXBOVREIE bit in the SWPMI_IER
register can be set in order to generate an interrupt as soon as the overrun occurs.
The RXOVRF flag is set at the same time as the RXNE flag, two SWPMI_RDR reads after
the overrun event occurred. It indicates that at least one received byte was lost, and the
loaded word in SWPMI_RDR contains the bytes received just before the overrun.
In Multi software buffer mode, if RXOVRF flag is set for the last word of the received frame,
then the overrun bit (bit 25 of the 8th word) is set for both the current and the next frame.
CRC error during payload reception
Once the two CRC bytes have been received, if the CRC is wrong, the RXBERF flag in the
SWPMI_ISR register is set after the EOF reception. An interrupt is generated if RXBEIE bit
in the SWPMI_IER register is set (refer toFigure 463: SWPMI single buffer mode reception
with CRC error).The user must set CRXBERF bit in SWPMI_ICR to clear RXBERF flag.
Figure 463. SWPMI single buffer mode reception with CRC error
Missing or corrupted stuffing bit during payload reception
When a stuffing bit is missing or is corrupted in the payload, RXBERF and RXBFF flags are
set in SWPMI_ISR after the EOF reception.
069
^K& K&ZϬ ϭ Ϯ ϯ ϰ ϱ ϲ ϳ ϴ ϵ ϭϬ ϭϭ ϭϮ
^tW
ŝŶƉƵƚ
ZyE
^tWD/ͺZZ
Zy&&
ϯͲϮͲϭͲϬ ϳͲϲͲϱͲϰ ϭϭͲϭϬͲϵͲϴ džͲdžͲϭϯͲϭϮ
džͲdžͲdžͲdž
dž ϭϰĚ
^tWD/ͺZ&>
ϭϯ
^h^WE
^tƌĞĂĚƐ
^tWD/ͺZZ
d&
^tĚĞƚĞĐƚƐĞƌƌŽƌ
ǁŝƚŚZyZ&ĨůĂŐ
ZyZ&
^tƌĞĂĚƐ
^tWD/ͺZZ
^tƌĞĂĚƐ
^tWD/ͺZZ
VHWE\+:FOHDUHGE\6:
VHWE\+:
VHWE\+:FOHDUHGE\6:
VHWE\+:FOHDUHGE\6:RU'0$
VHWE\+:FOHDUHGE\6:

Table of Contents

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the ST STM32L4x6 and is the answer not in the manual?

ST STM32L4x6 Specifications

General IconGeneral
BrandST
ModelSTM32L4x6
CategoryMicrocontrollers
LanguageEnglish

Related product manuals