ST STM32L4x6

DocID024597 Rev 3 933/1693
RM0351 General-purpose timers (TIM15/16/17)
1009
Figure 299. TIM16 and TIM17 block diagram
1. The internal break event source can be:
- A clock failure event generated by CSS. For further information on the CSS, refer to Section 6.2.9: Clock security
system (CSS)
- A PVD output
- SRAM parity error signal
- Cortex
®
-M4 LOCKUP (Hardfault) output
- COMP output
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