DocID024597 Rev 3 1059/1693
RM0351 System window watchdog (WWDG)
1062
Refer to the datasheet for the minimum and maximum values of the t
WWDG
.
33.3.5 Debug mode
When the microcontroller enters debug mode (Cortex
®
-M4 core halted), the WWDG counter
either continues to work normally or stops, depending on DBG_WWDG_STOP
configuration bit in DBG module. For more details, refer to Section 44.16.2: Debug support
for timers, RTC, watchdog, bxCAN and I2C.
t
WWDG
1 48000⁄ 4096× 2
3
× 63 1+()× 43.69 ms==
To Next Page
Loading...
Need help?
General
