DocID024597 Rev 3 941/1693
RM0351 General-purpose timers (TIM15/16/17)
1009
Figure 308. Update rate examples depending on mode and TIMx_RCR register
settings
28.4.4 Clock selection
The counter clock can be provided by the following clock sources:
• Internal clock (CK_INT)
• External clock mode1: external input pin
• Internal trigger inputs (ITRx) (only for TIM15): using one timer as the prescaler for
another timer, for example, you can configure TIM1 to act as a prescaler for TIM15.
Refer to Using one timer as prescaler for another timer on page 896 for more details.
Internal clock source (CK_INT)
If the slave mode controller is disabled (SMS=000), then the CEN (in the TIMx_CR1
register) and UG bits (in the TIMx_EGR register) are actual control bits and can be changed
(GJHDOLJQHGPRGH
8(9
8SGDWH(YHQWSUHORDGUHJLVWHUVWUDQVIHUUHGWRDFWLYHUHJLVWHUV
DQGXSGDWHLQWHUUXSWJHQHUDWHG
&RXQWHU
7,0[B&17
7,0[B5&5 8(9
7,0[B5&5 8(9
7,0[B5&5 8(9
7,0[B5&5 8(9
7,0[B5&5
DQG
UHV\QFKURQL]DWLRQ8(9
E\6:
8SFRXQWLQJ
069