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ST STM32L4x6 User Manual

ST STM32L4x6
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USB on-the-go full-speed (OTG_FS) RM0351
1512/1693 DocID024597 Rev 3
43.10 Dynamic update of the OTG_HFIR register
The USB core embeds a dynamic trimming capability of SOF framing period in host mode
allowing to synchronize an external device with the SOF frames.
When the OTG_HFIR register is changed within a current SOF frame, the SOF period
correction is applied in the next frame as described in Figure 498.
Figure 498. Updating OTG_HFIR dynamically
43.11 USB data FIFOs
The USB system features 1.25 Kbyte of dedicated RAM with a sophisticated FIFO control
mechanism. The packet FIFO controller module in the OTG_FS core organizes RAM space
into Tx FIFOs into which the application pushes the data to be temporarily stored before the
USB transmission, and into a single Rx FIFO where the data received from the USB are
temporarily stored before retrieval (popped) by the application. The number of instructed
FIFOs and how these are organized inside the RAM depends on the device’s role. In
peripheral mode an additional Tx FIFO is instructed for each active IN endpoint. Any FIFO
size is software configured to better meet the application requirements.
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ST STM32L4x6 Specifications

General IconGeneral
BrandST
ModelSTM32L4x6
CategoryMicrocontrollers
LanguageEnglish

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