ST STM32L4x6

DocID024597 Rev 3 495/1693
RM0351 Analog-to-digital converters (ADC)
540
Figure 120. Interleaved single channel CH0 with injected sequence CH11, CH12
Figure 121. Two Interleaved channels (CH1, CH2) with injected sequence CH11, CH12
- case 1: Master interrupted first
Figure 122. Two Interleaved channels (CH1, CH2) with injected sequence CH11, CH12
- case 2: Slave interrupted first
DMA requests in dual ADC mode
In all dual ADC modes, it is possible to use two DMA channels (one for the master, one for
the slave) to transfer the data, like in single mode (refer to Figure 123: DMA Requests in
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