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DocID024597 Rev 3 1077/1693

RM0351 Real-time clock (RTC)

1106

same moment, the application must not write ‘0’ into TSF bit unless it has already read it to

‘1’.

Optionally, a tamper event can cause a time-stamp to be recorded. See the description of

the TAMPTS control bit in Section 34.6.16: RTC tamper configuration register

(RTC_TAMPCR).

34.3.14 Tamper detection

The RTC_TAMPx input events can be configured either for edge detection, or for level

detection with filtering.

The tamper detection can be configured for the following purposes:

• erase the RTC backup registers (default configuration)

• generate an interrupt, capable to wakeup from Stop and Standby modes

• generate a hardware trigger for the low-power timers

RTC backup registers

The backup registers (RTC_BKPxR) are not reset by system reset or when the device

wakes up from Standby mode.

The backup registers are reset when a tamper detection event occurs (see Section 34.6.20:

RTC backup registers (RTC_BKPxR) and Tamper detection initialization on page 1077, or

when the readout protection of the flash is changed from level 1 to level 0) except if the

TAMPxNOERASE bit is set, or if TAMPxMF is set in the RTC_TAMPCR register.

Tamper detection initialization

Each input can be enabled by setting the corresponding TAMPxE bits to 1 in the

RTC_TAMPCR register.

Each RTC_TAMPx tamper detection input is associated with a flag TAMPxF in the RTC_ISR

When TAMPxMF is cleared:

The TAMPxF flag is asserted after the tamper event on the pin, with the latency provided

below:

• 3 ck_apre cycles when TAMPFLT differs from 0x0 (Level detection with filtering)

• 3 ck_apre cycles when TAMPTS=1 (Timestamp on tamper event)

• No latency when TAMPFLT=0x0 (Edge detection) and TAMPTS=0

A new tamper occurring on the same pin during this period and as long as TAMPxF is set

cannot be detected.

When TAMPxMF is set:

A new tamper occurring on the same pin cannot be detected during the latency described

above and 2.5 ck_rtc additional cycles.

By setting the TAMPIE bit in the RTC_TAMPCR register, an interrupt is generated when a

tamper detection event occurs (when TAMPxF is set). Setting TAMPIE is not allowed when

one or more TAMPxMF is set.

ST STM32L4x6 User Manual

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