ST STM32L4x6 User Manual

DocID024597 Rev 3 1187/1693
RM0351 Universal synchronous asynchronous receiver transmitter (USART)
1282
When no transmission is taking place, a write instruction to the USARTx_TDR register
places the data in the shift register, the data transmission starts, and the TXE bit is set.
If a frame is transmitted (after the stop bit) and the TXE bit is set, the TC bit goes high. An
interrupt is generated if the TCIE bit is set in the USARTx_CR1 register.
After writing the last data in the USARTx_TDR register, it is mandatory to wait for TC=1
before disabling the USART or causing the microcontroller to enter the low-power mode
(see Figure 386: TC/TXE behavior when transmitting).
Figure 386. TC/TXE behavior when transmitting
Break characters
Setting the SBKRQ bit transmits a break character. The break frame length depends on the
M bits (see Figure 384).
If a ‘1’ is written to the SBKRQ bit, a break character is sent on the TX line after completing
the current character transmission. The SBKF bit is set by the write operation and it is reset
by hardware when the break character is completed (during the stop bits after the break
character). The USART inserts a logic 1 signal (STOP) for the duration of 2 bits at the end of
the break frame to guarantee the recognition of the start bit of the next frame.
In the case the application needs to send the break character following all previously
inserted data, including the ones not yet transmitted, the software should wait for the TXE
flag assertion before setting the SBKRQ bit.
Idle characters
Setting the TE bit drives the USART to send an idle frame before the first data frame.
36.5.3 USART receiver
The USART can receive data words of either 7, 8 or 9 bits depending on the M bits in the
USARTx_CR1 register.
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ST STM32L4x6 Specifications

General

Brand	ST
Model	STM32L4x6
Category	Microcontrollers
Language	English