NXP Semiconductors K22F series - Page 28

Section number Title Page
34.6.1 External pins and routing............................................................................................................................. 809
34.6.2 Sources of error............................................................................................................................................811
Chapter 35
Comparator (CMP)
35.1 Introduction...................................................................................................................................................................817
35.1.1 CMP features................................................................................................................................................817
35.1.2 6-bit DAC key features................................................................................................................................ 818
35.1.3 ANMUX key features.................................................................................................................................. 818
35.1.4 CMP, DAC and ANMUX diagram..............................................................................................................819
35.1.5 CMP block diagram..................................................................................................................................... 820
35.2 Memory map/register definitions..................................................................................................................................822
35.2.1
CMP Control Register 0 (CMPx_CR0)....................................................................................................... 822
35.2.2
CMP Control Register 1 (CMPx_CR1)....................................................................................................... 823
35.2.3
CMP Filter Period Register (CMPx_FPR)...................................................................................................825
35.2.4
CMP Status and Control Register (CMPx_SCR).........................................................................................825
35.2.5
DAC Control Register (CMPx_DACCR)....................................................................................................826
35.2.6
MUX Control Register (CMPx_MUXCR).................................................................................................. 827
35.3 Functional description...................................................................................................................................................828
35.3.1 CMP functional modes.................................................................................................................................828
35.3.2 Power modes................................................................................................................................................837
35.3.3 Startup and operation................................................................................................................................... 838
35.3.4 Low-pass filter............................................................................................................................................. 839
35.4 CMP interrupts..............................................................................................................................................................841
35.5 DMA support................................................................................................................................................................ 841
35.6 CMP Asynchronous DMA support...............................................................................................................................842
35.7 Digital-to-analog converter...........................................................................................................................................843
35.8 DAC functional description.......................................................................................................................................... 843
35.8.1 Voltage reference source select....................................................................................................................843
35.9 DAC resets....................................................................................................................................................................844
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
28 NXP Semiconductors