NXP Semiconductors K22F series - Page 29

Section number Title Page
35.10 DAC clocks...................................................................................................................................................................844
35.11 DAC interrupts..............................................................................................................................................................844
Chapter 36
12-bit Digital-to-Analog Converter (DAC)
36.1 Introduction...................................................................................................................................................................845
36.2 Features.........................................................................................................................................................................845
36.3 Block diagram...............................................................................................................................................................845
36.4 Memory map/register definition................................................................................................................................... 846
36.4.1
DAC Data Low Register (DACx_DATnL)................................................................................................. 849
36.4.2
DAC Data High Register (DACx_DATnH)................................................................................................ 849
36.4.3
DAC Status Register (DACx_SR)............................................................................................................... 850
36.4.4
DAC Control Register (DACx_C0)............................................................................................................. 851
36.4.5
DAC Control Register 1 (DACx_C1).......................................................................................................... 852
36.4.6
DAC Control Register 2 (DACx_C2).......................................................................................................... 853
36.5 Functional description...................................................................................................................................................853
36.5.1 DAC data buffer operation...........................................................................................................................853
36.5.2 DMA operation............................................................................................................................................ 855
36.5.3 Resets........................................................................................................................................................... 855
36.5.4 Low-Power mode operation.........................................................................................................................855
Chapter 37
Voltage Reference (VREFV1)
37.1 Introduction...................................................................................................................................................................857
37.1.1 Overview......................................................................................................................................................858
37.1.2 Features........................................................................................................................................................ 858
37.1.3 Modes of Operation..................................................................................................................................... 859
37.1.4 VREF Signal Descriptions...........................................................................................................................859
37.2 Memory Map and Register Definition..........................................................................................................................860
37.2.1 VREF Trim Register (VREF_TRM)............................................................................................................860
37.2.2 VREF Status and Control Register (VREF_SC)..........................................................................................861
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
NXP Semiconductors 29