NXP Semiconductors K22F series - Page 32

Section number Title Page
39.3.13
Output Mask (FTMx_OUTMASK)............................................................................................................. 917
39.3.14
Function For Linked Channels (FTMx_COMBINE)...................................................................................919
39.3.15
Deadtime Insertion Control (FTMx_DEADTIME)..................................................................................... 924
39.3.16
FTM External Trigger (FTMx_EXTTRIG)................................................................................................. 925
39.3.17
Channels Polarity (FTMx_POL)..................................................................................................................927
39.3.18
Fault Mode Status (FTMx_FMS).................................................................................................................929
39.3.19
Input Capture Filter Control (FTMx_FILTER)........................................................................................... 931
39.3.20
Fault Control (FTMx_FLTCTRL)............................................................................................................... 932
39.3.21
Quadrature Decoder Control And Status (FTMx_QDCTRL)......................................................................935
39.3.22
Configuration (FTMx_CONF).....................................................................................................................937
39.3.23
FTM Fault Input Polarity (FTMx_FLTPOL)...............................................................................................938
39.3.24
Synchronization Configuration (FTMx_SYNCONF)..................................................................................939
39.3.25
FTM Inverting Control (FTMx_INVCTRL)................................................................................................941
39.3.26
FTM Software Output Control (FTMx_SWOCTRL)..................................................................................942
39.3.27
FTM PWM Load (FTMx_PWMLOAD)..................................................................................................... 945
39.4 Functional description...................................................................................................................................................946
39.4.1 Clock source.................................................................................................................................................947
39.4.2 Prescaler.......................................................................................................................................................948
39.4.3 Counter.........................................................................................................................................................948
39.4.4 Input Capture mode......................................................................................................................................954
39.4.5 Output Compare mode.................................................................................................................................958
39.4.6 Edge-Aligned PWM (EPWM) mode........................................................................................................... 959
39.4.7 Center-Aligned PWM (CPWM) mode........................................................................................................ 961
39.4.8 Combine mode............................................................................................................................................. 963
39.4.9 Complementary mode..................................................................................................................................970
39.4.10 Registers updated from write buffers...........................................................................................................971
39.4.11 PWM synchronization..................................................................................................................................973
39.4.12 Inverting.......................................................................................................................................................989
39.4.13 Software output control................................................................................................................................990
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
32 NXP Semiconductors