NXP Semiconductors K22F series - Page 38

Section number Title Page
44.1.3 Modes of Operation..................................................................................................................................... 1121
44.2 USB Voltage Regulator Module Signal Descriptions.................................................................................................. 1121
Chapter 45
Serial Peripheral Interface (SPI)
45.1 Introduction...................................................................................................................................................................1123
45.1.1 Block Diagram............................................................................................................................................. 1123
45.1.2 Features........................................................................................................................................................ 1124
45.1.3 Interface configurations............................................................................................................................... 1126
45.1.4 Modes of Operation..................................................................................................................................... 1126
45.2 Module signal descriptions........................................................................................................................................... 1128
45.2.1 PCS0/SS—Peripheral Chip Select/Slave Select.......................................................................................... 1128
45.2.2 PCS1–PCS3—Peripheral Chip Selects 1–3.................................................................................................1129
45.2.3 PCS4—Peripheral Chip Select 4..................................................................................................................1129
45.2.4 PCS5/PCSS—Peripheral Chip Select 5/Peripheral Chip Select Strobe.......................................................1129
45.2.5 SCK—Serial Clock......................................................................................................................................1129
45.2.6 SIN—Serial Input........................................................................................................................................ 1129
45.2.7 SOUT—Serial Output..................................................................................................................................1130
45.3 Memory Map/Register Definition.................................................................................................................................1130
45.3.1
Module Configuration Register (SPIx_MCR)............................................................................................. 1132
45.3.2
Transfer Count Register (SPIx_TCR)..........................................................................................................1135
45.3.3
Clock and Transfer Attributes Register (In Master Mode) (SPIx_CTARn)................................................ 1136
45.3.4
Clock and Transfer Attributes Register (In Slave Mode) (SPIx_CTARn_SLAVE)................................... 1140
45.3.5
Status Register (SPIx_SR)........................................................................................................................... 1142
45.3.6
DMA/Interrupt Request Select and Enable Register (SPIx_RSER)............................................................ 1145
45.3.7
PUSH TX FIFO Register In Master Mode (SPIx_PUSHR)........................................................................ 1147
45.3.8
PUSH TX FIFO Register In Slave Mode (SPIx_PUSHR_SLAVE)............................................................1149
45.3.9
POP RX FIFO Register (SPIx_POPR).........................................................................................................1149
45.3.10
Transmit FIFO Registers (SPIx_TXFRn).................................................................................................... 1150
45.3.11
Receive FIFO Registers (SPIx_RXFRn)......................................................................................................1150
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
38 NXP Semiconductors