NXP Semiconductors K22F series - Page 39

Section number Title Page
45.4 Functional description...................................................................................................................................................1151
45.4.1 Start and Stop of module transfers...............................................................................................................1152
45.4.2 Serial Peripheral Interface (SPI) configuration............................................................................................1152
45.4.3 Module baud rate and clock delay generation............................................................................................. 1156
45.4.4 Transfer formats...........................................................................................................................................1160
45.4.5 Continuous Serial Communications Clock..................................................................................................1169
45.4.6 Slave Mode Operation Constraints.............................................................................................................. 1171
45.4.7 Interrupts/DMA requests..............................................................................................................................1171
45.4.8 Power saving features.................................................................................................................................. 1173
45.5 Initialization/application information........................................................................................................................... 1174
45.5.1 How to manage queues................................................................................................................................ 1175
45.5.2 Switching Master and Slave mode...............................................................................................................1175
45.5.3 Initializing Module in Master/Slave Modes.................................................................................................1176
45.5.4 Baud rate settings.........................................................................................................................................1176
45.5.5 Delay settings...............................................................................................................................................1177
45.5.6 Calculation of FIFO pointer addresses.........................................................................................................1178
Chapter 46
Inter-Integrated Circuit (I2C)
46.1 Introduction...................................................................................................................................................................1181
46.1.1 Features........................................................................................................................................................ 1181
46.1.2 Modes of operation...................................................................................................................................... 1182
46.1.3 Block diagram..............................................................................................................................................1182
46.2 I2C signal descriptions..................................................................................................................................................1183
46.3 Memory map/register definition................................................................................................................................... 1184
46.3.1
I2C Address Register 1 (I2Cx_A1)..............................................................................................................1185
46.3.2
I2C Frequency Divider register (I2Cx_F)....................................................................................................1185
46.3.3
I2C Control Register 1 (I2Cx_C1)...............................................................................................................1186
46.3.4
I2C Status register (I2Cx_S)........................................................................................................................ 1188
46.3.5
I2C Data I/O register (I2Cx_D)................................................................................................................... 1190
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
NXP Semiconductors 39