DMA memory map (continued)
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
4000_9174
TCD Signed Destination Address Offset
(DMA_TCD11_DOFF)
16 R/W Undefined 22.3.30/475
4000_9176
TCD Current Minor Loop Link, Major Loop Count (Channel
Linking Enabled) (DMA_TCD11_CITER_ELINKYES)
16 R/W Undefined 22.3.31/476
4000_9176 DMA_TCD11_CITER_ELINKNO 16 R/W Undefined 22.3.32/477
4000_9178
TCD Last Destination Address Adjustment/Scatter Gather
Address (DMA_TCD11_DLASTSGA)
32 R/W Undefined 22.3.33/478
4000_917C TCD Control and Status (DMA_TCD11_CSR) 16 R/W Undefined 22.3.34/479
4000_917E
TCD Beginning Minor Loop Link, Major Loop Count
(Channel Linking Enabled)
(DMA_TCD11_BITER_ELINKYES)
16 R/W Undefined 22.3.35/481
4000_917E
TCD Beginning Minor Loop Link, Major Loop Count
(Channel Linking Disabled)
(DMA_TCD11_BITER_ELINKNO)
16 R/W Undefined 22.3.36/482
4000_9180 TCD Source Address (DMA_TCD12_SADDR) 32 R/W Undefined 22.3.22/469
4000_9184 TCD Signed Source Address Offset (DMA_TCD12_SOFF) 16 R/W Undefined 22.3.23/469
4000_9186 TCD Transfer Attributes (DMA_TCD12_ATTR) 16 R/W Undefined 22.3.24/470
4000_9188
TCD Minor Byte Count (Minor Loop Mapping Disabled)
(DMA_TCD12_NBYTES_MLNO)
32 R/W Undefined 22.3.25/471
4000_9188
TCD Signed Minor Loop Offset (Minor Loop Mapping
Enabled and Offset Disabled)
(DMA_TCD12_NBYTES_MLOFFNO)
32 R/W Undefined 22.3.26/472
4000_9188
TCD Signed Minor Loop Offset (Minor Loop Mapping and
Offset Enabled) (DMA_TCD12_NBYTES_MLOFFYES)
32 R/W Undefined 22.3.27/473
4000_918C
TCD Last Source Address Adjustment
(DMA_TCD12_SLAST)
32 R/W Undefined 22.3.28/474
4000_9190 TCD Destination Address (DMA_TCD12_DADDR) 32 R/W Undefined 22.3.29/475
4000_9194
TCD Signed Destination Address Offset
(DMA_TCD12_DOFF)
16 R/W Undefined 22.3.30/475
4000_9196
TCD Current Minor Loop Link, Major Loop Count (Channel
Linking Enabled) (DMA_TCD12_CITER_ELINKYES)
16 R/W Undefined 22.3.31/476
4000_9196 DMA_TCD12_CITER_ELINKNO 16 R/W Undefined 22.3.32/477
4000_9198
TCD Last Destination Address Adjustment/Scatter Gather
Address (DMA_TCD12_DLASTSGA)
32 R/W Undefined 22.3.33/478
4000_919C TCD Control and Status (DMA_TCD12_CSR) 16 R/W Undefined 22.3.34/479
4000_919E
TCD Beginning Minor Loop Link, Major Loop Count
(Channel Linking Enabled)
(DMA_TCD12_BITER_ELINKYES)
16 R/W Undefined 22.3.35/481
4000_919E
TCD Beginning Minor Loop Link, Major Loop Count
(Channel Linking Disabled)
(DMA_TCD12_BITER_ELINKNO)
16 R/W Undefined 22.3.36/482
4000_91A0 TCD Source Address (DMA_TCD13_SADDR) 32 R/W Undefined 22.3.22/469
4000_91A4 TCD Signed Source Address Offset (DMA_TCD13_SOFF) 16 R/W Undefined 22.3.23/469
Table continues on the next page...
Chapter 22 Enhanced Direct Memory Access (eDMA)
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
NXP Semiconductors 439