NXP Semiconductors K22F series - Page 45

Section number Title Page
Chapter 50
General-Purpose Input/Output (GPIO)
50.1 Introduction...................................................................................................................................................................1375
50.1.1 Features........................................................................................................................................................ 1375
50.1.2 Modes of operation...................................................................................................................................... 1375
50.1.3 GPIO signal descriptions............................................................................................................................. 1376
50.2 Memory map and register definition.............................................................................................................................1377
50.2.1
Port Data Output Register (GPIOx_PDOR).................................................................................................1378
50.2.2
Port Set Output Register (GPIOx_PSOR)....................................................................................................1379
50.2.3
Port Clear Output Register (GPIOx_PCOR)................................................................................................1380
50.2.4
Port Toggle Output Register (GPIOx_PTOR)............................................................................................. 1380
50.2.5
Port Data Input Register (GPIOx_PDIR).....................................................................................................1381
50.2.6
Port Data Direction Register (GPIOx_PDDR).............................................................................................1381
50.3 Functional description...................................................................................................................................................1382
50.3.1 General-purpose input..................................................................................................................................1382
50.3.2 General-purpose output................................................................................................................................1382
Chapter 51
JTAG Controller (JTAGC)
51.1 Introduction...................................................................................................................................................................1383
51.1.1 Block diagram..............................................................................................................................................1383
51.1.2 Features........................................................................................................................................................ 1384
51.1.3 Modes of operation...................................................................................................................................... 1384
51.2 External signal description............................................................................................................................................1386
51.2.1 TCK—Test clock input................................................................................................................................1386
51.2.2 TDI—Test data input................................................................................................................................... 1386
51.2.3 TDO—Test data output................................................................................................................................1386
51.2.4 TMS—Test mode select...............................................................................................................................1386
51.3 Register description...................................................................................................................................................... 1387
51.3.1 Instruction register....................................................................................................................................... 1387
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
NXP Semiconductors 45