Address: 4000_8000h base + 2Ch offset = 4000_802Ch
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
0
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
ERR15
ERR14
ERR13
ERR12
ERR11
ERR10
ERR9
ERR8
ERR7
ERR6
ERR5
ERR4
ERR3
ERR2
ERR1
ERR0
W
w1c w1c w1c w1c w1c w1c
w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
DMA_ERR field descriptions
Field Description
31–16
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
15
ERR15
Error In Channel 15
0 An error in this channel has not occurred
1 An error in this channel has occurred
14
ERR14
Error In Channel 14
0 An error in this channel has not occurred
1 An error in this channel has occurred
13
ERR13
Error In Channel 13
0 An error in this channel has not occurred
1 An error in this channel has occurred
12
ERR12
Error In Channel 12
0 An error in this channel has not occurred
1 An error in this channel has occurred
11
ERR11
Error In Channel 11
0 An error in this channel has not occurred
1 An error in this channel has occurred
10
ERR10
Error In Channel 10
0 An error in this channel has not occurred
1 An error in this channel has occurred
Table continues on the next page...
Chapter 22 Enhanced Direct Memory Access (eDMA)
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
NXP Semiconductors 461